Application-Specific Design of Wireless Network-on-Chip with Geographic Routing for Gigascale MPSoCs

To bridge the widening gap between computation requirements and communication efficiency faced by gigascale heterogeneous multi-processor SoCs in the upcoming billion-transistor era, a new on-chip communication system, dubbed Wireless Network-on-Chip (WNoC), is proposed by using the recently developed Radio-on-Chip technology. With the uniqueness of wireless interconnection, the WNoC design paradigm calls for effective solutions to overhaul the on-chip communication infrastructure of nanoscale MPSoCs. In this research, we present the design of applicationspecific communication infrastructure of WNoC, specifically the RF node placement and core clustering to meet diverse functionality, size and communication requirements. We develop an integral data transmission protocol with the emphasis on a quadrant-based routing protocol design and synthesis, aiming at improving hardware efficiency and network concurrency.